NEC Develops Alternative to DRAM, Flash
At the IEEE International Solid-State Circuits Conference in San Francisco, the Tokyo-based company said it has successfully developed 512-Kb cross-point (CP) magnetoresistive random-access memory -- or MRAM -- comprised of a simple CP-type cell structure that enables high-density data storage.
MRAM is being prepped as the next-generation memory for use in mobile telephones, laptop computers and other computers because it is fast, non-volatile, uses less power and has a high density. The memory chip stores information magnetically and reads the information by the magneto resistance effect. The magneto resistance effect is the change in resistance of a conductor due to the presence of a magnetic field
According to NEC researchers, MRAM can be endlessly rewritten with no data loss (whereas existing flash memory is limited to about one million times). MRAM also can be easily incorporated into CMOS devices, because the magnetic tunnel junction (MTJ) device can be integrated into a device after the CMOS manufacturing process is complete. NEC says MRAM memory is a better play because layering the simple cell structure can increase capacity.
The new CP-type MRAM was fabricated using NEC's 0.25um CMOS and 0.6um MRAM processes. Its cell structure consists of a word line (WL), a bit line (BL) and a MTJ.
In a conventional CP structure, the cells in the memory array are not isolated, and the output signal during read operation tends to become overwhelmed by parasitic noise, making a selected CP cell's data difficult to read. To resolve this problem, NEC developed a new cell selection method and current sense amplifier
NEC said it will now work with rival Toshiba to advance the technology. In September 2002, the two companies combined their respective technological capabilities and formed an MRAM development team aimed at accelerating the research and development of MRAM technology and bringing it to the product development level.
Earlier in the day, NEC said it has developed a clock and data recovery (CDR) circuit for high-end, large-scale integrated (LSI) chips that could be used in next-generation broadband networks and high-speed computing servers.
In contrast with conventional CDRs, NEC said it achieved transmissions of 10 gigabits per second (Gbps).